1. Field of the Invention
The present invention relates generally to methods for forming copper containing conductor layers within microelectronic fabrications. More particularly, the present invention relates to methods for forming passivated copper containing conductor layers within microelectronic fabrications.
2. Description of the Related Art
Microelectronic fabrications are formed from microelectronic substrates over which are formed patterned conductor layers which are separated by dielectric layers.
As microelectronic fabrication integration levels have increased and patterned conductor layer dimensions have decreased, it has become increasingly common within the art of microelectronic fabrication to employ when fabricating patterned conductor layers within microelectronic fabrications copper containing conductor materials, in place of more conventional aluminum containing conductor materials.
Copper containing conductor materials are desirable in the art of microelectronic fabrication for forming patterned conductor layers within microelectronic fabrications, in place of more conventional aluminum containing conductor materials for forming patterned conductor layers within microelectronic fabrications, insofar as patterned conductor layers formed of copper containing conductor materials are generally less susceptible to detrimental effects, such as but not limited to detrimental electromigration effects.
While patterned conductor layers formed of copper containing conductor materials are thus clearly desirable in the art of microelectronic fabrication, patterned conductor layers formed of copper containing conductor materials are nonetheless not entirely without problems in the art of microelectronic fabrication. In that regard, it is known in the art of microelectronic fabrication that patterned conductor layers formed of copper containing conductor materials are often difficult to form within microelectronic fabrications with enhanced integrity, and in particular with enhanced physical integrity, such as but not limited to enhanced dimensional integrity.
It is thus desirable in the art of microelectronic fabrication to provide methods for forming within microelectronic fabrications, with enhanced integrity, patterned conductor layers formed of copper containing conductor materials.
It is towards the foregoing object that the present invention is more specifically directed.
Various methods have been disclosed in the art of microelectronic fabrication for forming, with desirable properties, patterned conductor layers formed of copper containing conductor materials.
Included among the methods, but not limited among the methods, are methods disclosed within: (1) McTeer, in U.S. Pat. No. 5,939,788, (a pair of methods for forming, with enhanced manufacturing efficiency, patterned copper containing conductor layers within apertures within microelectronic substrates by employing: (a) a titanium aluminum nitride layer as a thermally stable barrier layer; or (b) an aluminum liner layer as an adhesion promoter layer interposed between a patterned copper containing conductor layer and an otherwise conventional barrier layer); (2) Nogami et al., in U.S. Pat. No. 6,043,153 (a method for forming, with enhanced electromigration resistance, a patterned copper containing conductor layer within an aperture within a substrate employed within a microelectronic fabrication by thermally annealing the patterned copper containing conductor layer formed within the aperture prior to forming thereupon a passivating layer); and (3) Ohashi et al., in U.S. Pat. No. 6,184,143 (a method for forming, with enhanced reliability, a microelectronic fabrication having formed therein a dished chemical mechanical polish (CMP) planarized patterned copper containing conductor layer by planarizing the dished chemical mechanical polish (CMP) planarized patterned copper containing conductor layer with a spin-on planarizing material).
Desirable in the art of microelectronic fabrication are additional methods which may be employed for forming within microelectronic fabrications, with enhanced integrity, patterned conductor layers formed of copper containing conductor materials.
It is towards the foregoing object that the present invention is more specifically directed.
A first object of the present invention is to provide a method for forming within a microelectronic fabrication a patterned copper containing conductor layer.
A second object of the present invention is to provide a method in accord with the first object of the present invention, wherein the patterned copper containing conductor layer is formed with enhanced integrity.
A third object of the present invention is to provide a method in accord with the first object of the present invention and the second object of the present invention, wherein the method is readily commercially implemented.
In accord with the objects of the present invention, there is provided by the present invention a method for fabricating a microelectronic fabrication. To practice the method of the present invention, there is first provided a substrate. There is then formed over the substrate a copper containing conductor layer. Finally, there is then formed upon the copper containing conductor layer a passivation layer. Within the present invention, the passivation layer is formed by sequentially. (1) pre-heating the copper containing conductor layer to a temperature of from about 300 to about 450 degrees centigrade for a time period of from about 30 to about 120 seconds to form a pre-heated copper containing conductor layer; (2) plasma treating the pre-heated copper containing conductor layer within a reducing plasma to form a plasma treated preheated copper containing conductor layer; and (3) forming upon the plasma treated pre-heated copper containing conductor layer the passivation layer.
Within the present invention, by pre-heating the copper containing conductor layer to form the pre-heated copper containing conductor layer and then plasma treating the pre-heated copper containing conductor layer to form the plasma treated pre-heated copper containing conductor layer, there is attenuated hillock defects within the plasma treated pre-heated copper containing conductor layer when forming the passivation layer thereupon. Thus, in accord with the objects of the present invention there is provided by the present invention a method for forming a copper containing conductor layer with enhanced integrity.
The method of the present invention is readily commercially implemented.
The present invention employs methods and materials as are otherwise generally known in the art of microelectronic fabrication, but employed within the context of a specific process ordering and a specific series of process limitations to provide the present invention. Since it is thus at least in part a specific process ordering and a specific series of process limitations which provides at least in part the present invention, rather than the existence of methods and materials which provides the present invention, the method of the present invention is readily commercially implemented.